Stint @ ASTI

Finally, the VHDL-based FPGA design seminar is over! Being one of its lab assistants was one worthwhile experience. I get to learn and improve more of my skills in VHDL & FPGA.

The trainees are faculty members of different universities here in the Philippines. This is where we, (Dean, Elma and I)the students, became teachers while teachers became students. I enjoyed this kind of role-reversal. Imagine these teachers being looked up to by their students in other universities, while they (teachers) look up to us for the training. I kinda felt some natural high.

Soon enough, Hardware Design Languages would be incorporated into the Engineering (ECE/CoE or even CS) curriculums of other universities. Being part of UP-Intel Microlab, we were the major proponents of it. Para sa Pilipinas! (in this case, at least we are to be payed for as student assistants :P)

The "Legendary Sannin" (3 student trainers of the seminar)