I should had posted this last week, but due to the sad demise of Roco, I could just not share my rant at that time. Last thursday was our due date for our MP in CoE111 (Advanced Digital Design). We are to program a switched Arithmetic Logic Unit using VHDL (Very high speed integrated circuit Hardware Description Language). I did some late night-early morning programming as I was just able to sneak in a 1 hour nap for the whole session. You may blame me for cramming the night out but actually there were things that just wasted my time during the whole process.
I was able to download Aldec's (name of company) VHDL compiler; but then I could not figure out how to work out with its simulator. I was expecting some waveform testbenches but it came out differently. Consequently, I spent some time asking through ym; still, couldn't figure it out. Good thing I had this copy of Xilinx, which was the actual software used in our lab class. Problem is, I could not make the ISE simulator work. Even though I got to have some student's license from the net, the integrated version just won't work. The only thing I had done the whole night was to code and check the syntax. No testbench done.
I believe I had wasted much more time in figuring out things rather than coding itself. I call it a waste because nothing productive came out of it. I was not able to use ALDEC, and I was not able to testbench through XILINX. Due date is near and still I don't have some documentation at hand. I planned to finish everything that day anyway.
I did everything I can. I maximized my time, planned to cut-class in EEE107 (good thing there really was no class) and had to sit-in in a part of the lab class (my turn should still be at 4pm, good thing there was still a vacant PC). I became pretty confident that my code would work since the syntax was correct. Thus, I started my documentation in class. I figured out that it was the important thing to be done first because it is the very physical evidence that I had done the Machine Program.
Later on, Teejay (the SA) started checking out on our work. He checked through the testbenches of our functions. As I started to try and testbench mine, an error message appeared, indicating a "fuse failed, must recompile...blah blah". The 2 SAs ("kuya" Teejay and Ige) were present, and both of them don't know what the error message meant. It was weird that I had a correct program syntax, was able to produce an RTL schematic, but was not able to testbench. Is it me, my program or the darn thing I'm using?
Frustation. That's the word. After a sleepless night of coding, nothing seemed to happen. It was only the add function that worked and that I was able to show. Weird. Only one function out of many, and that one function was really just a give away. Though only PI had a full working program, at least the others were able to show a majority of working functions. What would my MP grade be then? I don't even have a hard copy of my docu!
Fuse Failed. What an error message. The phrase haunts me. It is even used against me (by Elma!!). I had been thinking about it the whole weekend. Planned to work during the UPCAT days, but nothing happened. I guess I had to unwind a bit and pull out the stress.
I had done nothing about it during the weekend... until this 1130pm, Sunday. I tried to work my Xilinx again. Walla! The Modelsim integrated with my Xilinx worked! Weird. Why did it not work before?!! Tried to make some testbenches... compiled... put inputs... simulate... and it worked. IT WORKED.
What happened back then?!! In the corporate world, I could have sued everyone for giving me a hard time. Still, thank God!
**Note: I really had not checked its full functionality yet, but I'm just as happy that the "fuse did not really fail"... or whatever it meant. It was the darn thing. Yeah, it was...
Labels: College Life
posted by ScIoN 1:01 AM